A 32-bit wide main memory unit with a capacity of 1 GB is built using 256M × 4-bit DRAM chips

Q. A 32-bit wide main memory unit with a capacity of 1 GB is built using 256M × 4-bit DRAM chips. The number of rows of memory cells in the DRAM chip is 2¹⁴. The time taken to perform one refresh operation is 50 nanoseconds. The refresh period is 2 milliseconds. The percentage (rounded to the closest integer) of the time available for performing the memory read/write operations in the main memory unit is                                       .

Ans: 59 – 60

Sol:

1 refresh operation takes 50ns.

Total number of rows = 2¹⁴

Total time to refresh all Rows =214 × 50 ns = 819200 ns = 0.819200 ms

The Refresh Period is 2ms.

% Time in refresh = (Time to Refresh all Rows/Refresh period)∗100% Time spent in Read/Write = 100−40.96=59.04%                    

Time spent in Read/Write =100−40.96=59.04%