Given, ๐‘‰๐‘”๐‘  is the gate-source voltage, ๐‘‰๐‘‘๐‘  is the drain source voltage, and ๐‘‰๐‘กโ„Ž is the threshold voltage of an enhancement type NMOS transistor

Q. Given, ๐‘‰๐‘”๐‘  is the gate-source voltage, ๐‘‰๐‘‘๐‘  is the drain source voltage, and ๐‘‰๐‘กโ„Ž is the threshold voltage of an enhancement type NMOS transistor, the conditions for transistor to be biased in saturation are

(A) ๐‘‰๐‘”๐‘  < ๐‘‰๐‘กโ„Ž ; ๐‘‰๐‘‘๐‘  โ‰ฅ ๐‘‰๐‘”๐‘  โˆ’ ๐‘‰๐‘กโ„Ž

(B) ๐‘‰๐‘”๐‘  > ๐‘‰๐‘กโ„Ž ; ๐‘‰๐‘‘๐‘  โ‰ฅ ๐‘‰๐‘”๐‘  โˆ’ ๐‘‰๐‘กโ„Ž

(C) ๐‘‰๐‘”๐‘  > ๐‘‰๐‘กโ„Ž ; ๐‘‰๐‘‘๐‘  โ‰ค ๐‘‰๐‘”๐‘  โˆ’ ๐‘‰๐‘กโ„Ž

(D) ๐‘‰๐‘”๐‘  < ๐‘‰๐‘กโ„Ž ; ๐‘‰๐‘‘๐‘  โ‰ค ๐‘‰๐‘”๐‘  โˆ’ ๐‘‰๐‘กโ„Ž

Ans: Vgs > Vth; Vds โ‰ฅ Vgs โ€“ Vth

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