gate questions
A band limited low-pass signal π‘₯(𝑑) of bandwidth 5 kHz is sampled at a sampling rate 𝑓𝑠

Q. A band limited low-pass signal π‘₯(𝑑) of bandwidth 5 kHz is sampled at a sampling rate 𝑓𝑠. The signal π‘₯(𝑑) is reconstructed using the reconstruction filter 𝐻(𝑓) whose magnitude response is shown below: The minimum sampling rate 𝑓𝑠 (in kHz) for perfect reconstruction of π‘₯(𝑑) ...

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In the circuit shown below, a positive edge-triggered D Flip-Flop is used for sampling input data

Q. In the circuit shown below, a positive edge-triggered D Flip-Flop is used for sampling input data 𝐷𝑖𝑛 using clock 𝐢𝐾. The XOR gate outputs 3.3 volts for logic HIGH and 0 volts for logic LOW levels. The data bit and clock periods are equal and the value of Δ𝑇/𝑇𝐢𝐾 = 0.15, where the parameters Δ𝑇 ...

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An op-amp based circuit is implemented as shown below

Q. An op-amp based circuit is implemented as shown below. In the above circuit, assume the op-amp to be ideal. The voltage (in volts, correct to one decimal place) at node A, connected to the negative input of the op-amp as indicated in the figure is    . Ans: 0.4 - 0.6

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