gate questions
A band limited low-pass signal ๐‘ฅ(๐‘ก) of bandwidth 5 kHz is sampled at a sampling rate ๐‘“๐‘ 

Q. A band limited low-pass signal ๐‘ฅ(๐‘ก) of bandwidth 5 kHz is sampled at a sampling rate ๐‘“๐‘ . The signal ๐‘ฅ(๐‘ก) is reconstructed using the reconstruction filter ๐ป(๐‘“) whose magnitude response is shown below: The minimum sampling rate ๐‘“๐‘  (in kHz) for perfect reconstruction of ๐‘ฅ(๐‘ก) ...

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In the circuit shown below, a positive edge-triggered D Flip-Flop is used for sampling input data

Q. In the circuit shown below, a positive edge-triggered D Flip-Flop is used for sampling input data ๐ท๐‘–๐‘› using clock ๐ถ๐พ. The XOR gate outputs 3.3 volts for logic HIGH and 0 volts for logic LOW levels. The data bit and clock periods are equal and the value of ฮ”๐‘‡/๐‘‡๐ถ๐พ = 0.15, where the parameters ฮ”๐‘‡ ...

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An op-amp based circuit is implemented as shown below

Q. An op-amp based circuit is implemented as shown below. In the above circuit, assume the op-amp to be ideal. The voltage (in volts, correct to one decimal place) at node A, connected to the negative input of the op-amp as indicated in the figure isย ย ย  . Ans: 0.4 - 0.6

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