Gkseries.com

The logic gates shown in the digital circuit below use strong pull-down nMOS transistors for LOW logic level at the outputs

The logic gates shown in the digital circuit below use strong pull-down nMOS transistors for LOW logic level at the outputs

Q. The logic gates shown in the digital circuit below use strong pull-down nMOS transistors for LOW logic level at the outputs. When the pull-downs are off, high-value resistors set the output logic levels to HIGH (i.e. the pull-ups are weak). Note that some nodes are intentionally shorted to implement “wired logic”. Such shorted nodes will be HIGH only if the outputs of all the gates whose outputs are shorted are HIGH.

The number of distinct values of 𝑋3𝑋2𝑋1𝑋0 (out of the 16 possible values) that giv 𝑌 = 1 is

Ans: 8

Exit mobile version