Computer Organization and Architecture Quiz | Computer Organization and Architecture Short Questions and Answers

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Questions
41 The addressing mode used in an instruction of the form ADD X Y, is _____.
A Absolute
B indirect
C index
D none of these

Answer: index
42 Von Neumann architecture is ______.
A SISD
B SIMD
C MIMD
D MISD

Answer: SISD
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43 The circuit used to store one bit of data is known as ______.
A Encoder
B OR gate
C Flip Flop
D Decoder

Answer: Flip Flop
44 Cache memory acts between_______.
A CPU and RAM
B RAM and ROM
C CPU and Hard Disk
D None of these

Answer: CPU and RAM
45 Write Through technique is used in which memory for updating the data _____.
A Virtual memory
B Main memory
C Auxiliary memory
D Cache memory

Answer: Cache memory
46 Generally Dynamic RAM is used as main memory in a computer system as it______.
A Consumes less power
B has higher speed
C has lower cell density
D needs refreshing circuitry

Answer: has higher speed
47 In signed-magnitude binary division, if the dividend is (11100)2 and divisor is (10011)2 then the result is ______.
A (00100)2
B (10100)2
C (11001)2
D 01100)2

Answer: (10100)2
48 Virtual memory consists of _______.
A Static RAM
B Dynamic RAM
C Magnetic memory
D None of these

Answer: Static RAM
49 In a program using subroutine call instruction, it is necessary______.
A initialize program counter
B Clear the accumulator
C Reset the microprocessor
D Clear the instruction register

Answer: Firms and households.
50 A Stack-organised Computer uses instruction of _____.
A Indirect addressing
B Two-addressing
C Zero addressing
D Index addressing

Answer: Zero addressing
51 If the main memory is of 8K bytes and the cache memory is of 2K words. It uses associative mapping. Then each word of cache memory shall be_____.
A 11 bits
B 21 bits
C 16 bits
D 20 bits

Answer: 16 bits
52 Logic X-OR operation of (4ACO)H& (B53F)H results _____.
A AACB
B 0000
C FFFF
D ABCD

Answer: FFFF
53 When CPU is executing a Program that is part of the Operating System, it is said to be in _____.
A Interrupt mode
B System mode
C Half mode
D Simplex mode

Answer: System mode
54 An n-bit microprocessor has_____.
A n-bit program counter
B n-bit address register
C n-bit ALU
D n-bit instruction register

Answer: n-bit instruction register
55 Cache memory works on the principle of_____.
A Locality of data
B Locality of memory
C Locality of reference
D Locality of reference & memory

Answer: Locality of reference
56 In computers, subtraction is carried out generally by____.
A 1’s complement method
B 2’s complement method
C signed magnitude method
D BCD subtraction method

Answer: 2’s complement method
57 PSW is saved in stack when there is a _____.
A interrupt recognized
B execution of RST instruction
C Execution of CALL instruction
D All the above

Answer: interrupt recognized
58 The multiplicand register & multiplier register of a hardware circuit implementing booth’s algorithm have (11101) & (1100). The result shall be ______.
A (812)10
B (-12)10
C (12)10
D (-812)10

Answer: (812)10
59 The circuit converting binary data in to decimal is_____.
A Encoder
B Multiplexer
C Decoder
D Code converter

Answer: Code converter
60 A three input NOR gate gives logic high output only when_____.
A one input is high
B one input is low
C two input are low
D all input are high

Answer: all input are high

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