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Free download in PDF Microcontrollers and Applications MCQs and Answers for competitive exams. These short objective type questions with answers are very important for Board exams as well as competitive exams. These short solved questions or quizzes are provided by Gkseries.
81
Which among the below stated statements does not exhibit the characteristic feature of 16-bit microcontroller?
[A]
Large program & data memory spaces
[B]
High speed
[C]
I/O Flexibility
[D]
Limited Control Applications
Answer: Limited Control Applications
82
Which word size is approved to be of greater importance for performing the small computational tasks along with its storage usability feature adopted by ASCII code?
[A]
4-bit
[B]
8-bit
[C]
16-bit
[D]
32-bit
83
Which minimum mode signal is used for demultiplexing the data and address lines with the assistance of an external latch in a microprocessor while accessing memory segment?
[A]
INTA
[B]
DTE
[C]
HOLD
[D]
ALE
84
Why do the microprocessors possess very few bit manipulating instructions?
[A]
Because they mostly operate on bits/ word data
[B]
Because they mostly operate on byte/word data
[C]
Both a & b
[D]
None of the above
Answer: Because they mostly operate on byte/word data
85
How does the microcontroller communicate with the external peripherals/memory?
[A]
via I/O ports
[B]
via register arrays
[C]
via memory
[D]
All of the above
86
Which functioning element of microcontroller generate and transmit the address of instructions to memory through internal bus?
[A]
Instruction Decoding Unit
[B]
Timing and Control Unit
[C]
Program Counter
[D]
Arithmetic Logic Unit
87
Which instructions contribute to an effective adoption or utilization of stack memory which usually plays a crucial role in storage of intermediate results?
[A]
ACALL
[B]
RETI
[C]
PUSH & POP
[D]
All of the above
88
What is the status of stack pointer for the execution of PUSH and POP operations?
[A]
It gets post-decremented for PUSH & pre-incremented for POP
[B]
It gets pre-incremented for PUSH & post-decremented for POP
[C]
It gets pre-incremented for PUSH as well as POP
[D]
It gets post-decremented for PUSH as well as POP
Answer: It gets pre-incremented for PUSH & post-decremented for POP
89
Which among the category of program branching instructions allow 16 bit address to be specified & can jump anywhere within 64K block of program memory?
[A]
Long jumps (LJMP)
[B]
Short jumps (SJMP)
[C]
Absolute jumps (AJMP)
[D]
All of the above
Answer: Long jumps (LJMP)
90
What is the possible range of transfer control for 8-bit relative address especially in 2’s complement form with respect to the first byte of preceding instruction?
[A]
-115 to 132 bytes
[B]
-130 to 132 bytes
[C]
-128 to 127 bytes
[D]
-115 to 127 bytes
Answer: -128 to 127 bytes
91
Which among the single operand instructions complement the accumulator without affecting any of the flags?
[A]
CLR
[B]
SETB
[C]
CPL
[D]
All of the above
92
Which rotate instruction/s has an ability to modify CY flag by moving the bit-7 & bit-0 respectively to an accumulator?
[A]
RR & RL
[B]
RLC & RRC
[C]
RR & RRC
[D]
RL & RLC
93
Which form of instructions also belong to the category of logical instructions in addition to bitwise logical instructions?
[A]
Single-operand instructions
[B]
Rotate instructions
[C]
Swap instructions
[D]
All of the above
94
What can be the oscillator period for the multiplication operation of A & B in accordance to 16-bit product especially in B:A registers?
[A]
12
[B]
24
[C]
36
[D]
48
95
How many bytes are supposed to get occupied while subtracting indirect RAM from an accumulator along with borrow under the execution of SUBB A, @Ri?
96
Which flag allow to carry out the signed as well as unsigned addition and subtraction operations?
[A]
CY
[B]
OV
[C]
AC
[D]
F0
97
What does the instruction XCHD A, @Ri signify during the data transfer in the program execution?
[A]
Exchange of register with an accumulator
[B]
Exchange of direct byte with an accumulator
[C]
Exchange of indirect RAM with an accumulator
[D]
Exchange of low order digit indirect RAM with an accumulator
Answer: Exchange of low order digit indirect RAM with an accumulator
98
Which instruction should be adopted for moving an accumulator to the register from the below mentioned mnemonics?
[A]
MOV A, Rn
[B]
MOV A, @ Ri
[C]
MOV Rn, A
[D]
MOV direct, A
99
What kind of PSW flags remain unaffected by the data transfer instructions?
[A]
Auxillary Carry Flags
[B]
Overflow Flags
[C]
Parity Flags
[D]
All of the above
100
How many single byte, two-byte and three-byte instructions are supported by MCS-51 from the overall instruction set?
[A]
55 – single byte, 35 two-byte & 21 three-byte instructions
[B]
50 – single byte, 30 two-byte & 31 three-byte instructions
[C]
42 – single byte, 45 two-byte & 24 three-byte instructions
[D]
45 – single byte, 45 two-byte & 17 three-byte instructions
Answer: 45 – single byte, 45 two-byte & 17 three-byte instructions
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