Microcontrollers and Applications Quiz | Microcontrollers and Applications Multiple Choice Questions and Answers

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Questions
1 Which among the below assertions represent the salient features of PIC in C-18 compiler?
A Transparent read/ write access to an external memory
B Provision of supporting an inline assembly during the necessity of an overall control
C Integration with MPLAB IDE for source-level debugging
D All of the above

Answer: All of the above
2 Which register/s should set the SPEN bit in order to configure RC7/RX/DT pins as DT (data lines)?
A TXSTA
B RCSTA
C Both a and b
D None of the above

Answer: RCSTA
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3 Which bit plays a salient role in defining the master or slave mode in TXSTA register especially in synchronous mode?
A RSRC
B CSRC
C SPEN
D SYNC

Answer: CSRC
4 What is the status of shift clock supply in an USART synchronous mode?
A Master-internally, Slave-externally
B Master-externally, Slave-internally
C Master & Slave (both) – internally
D Master & Slave (both) – externally

Answer: Master-internally, Slave-externally
5 How is the baud rate specified for high-speed (BRGH = 1) operation in an asynchronous mode?
A FOSC / 8 (X + 1)
B FOSC / 16 (X + 1)
C FOSC / 32 (X + 1)
D FOSC / 64 (X + 1)

Answer: FOSC / 16 (X + 1)
6 Why is the flag bit TXIF tested or examined in the PIR1 register after shifting all the data bits during the initialization process of USART in asynchronous mode?
A For ensuring the transmission of byte
B For ensuring the reception of byte
C For ensuring the on-chip baud rate generation
D For ensuring the 9th bit as a parity

Answer: For ensuring the transmission of byte
7 What is the purpose of a special function register SPBRG in USART?
A To control the operation associated with baud rate generation
B To control an oscillator frequency
C To control or prevent the false bit transmission of 9th bit
D All of the above

Answer: To control the operation associated with baud rate generation
8 Where should the value of TX9 bit be loaded during the 9 bit transmission in an asynchronous mode?
A TXSTA
B RCSTA
C SPBRG
D All of the above

Answer: TXSTA
9 How many upper bits of SSPSR are comparable to the address located in SSPADD especially after the shifting of 8 bits into SSPSR under the execution of START condition?
A 7
B 8
C 16
D 32

Answer: 7
10 transmitted, after an execution (set) of BF flag?
A SCL line
B SDA line
C Both a & b
D None of the above

Answer: SDA line
11 Which command/s should be essentially written for I2C input threshold selection and slew rate control operations?
A SSPSTAT
B SSPIF
C ACKSTAT
D All of the above

Answer: SSPSTAT
12 Which bits assist in determining the I2C bit rate during the initialization process of MSSP module in I2C mode?
A SSPADD
B SSPBUF
C Both a & b
D None of the above

Answer: SSPADD
13 What should be the value of SSPM3:SSPM0 bits so that SPI can enter the slave mode by enabling SS pin control?
A 0000
B 0100
C 0010
D 0001

Answer: 0100
14 Which bit of SSPCON must be necessarily set so as to enable the synchronization of serial port?
A WCOL
B SSPOV
C CKP
D SSPEN

Answer: SSPEN
15 Which among the below stated conditions are selected by the SSPCON & SSPSTAT control bits?
A Slave Select mode in slave mode
B Data input sample phase
C Clock Rate in master mode
D All of the above

Answer: All of the above
16 Which among the below stated components should be filtered for determining the cut-off frequency corresponding to the PW period of low-pass filter?
A Fundamental FPWM & higher harmonics
B Resonant FPWM & higher harmonics
C Slowly Varying DC components
D Slowly Varying AC components

Answer: Fundamental FPWM & higher harmonics
17 How do the variations in an average value get affected by PWM period?
A Longer the PWM period, faster will be the variation in an average value
B Shorter the PWM period, faster will be the variation in an average value
C Shorter the PWM period, slower will be the variation in an average value
D Longer the PWM period, slower will be the variation in an average value

Answer: Shorter the PWM period, faster will be the variation in an average value
18 What would be the resolution value if oscillator and PWM frequencies are 16MHz and 2 MHz respectively?
A 2
B 3
C 4
D 8

Answer: 3
19 Why are the pulse width modulated outputs required in most of the applications?
A To control average value of an input variables
B To control average value of output variables
C Both a & b
D None of the above

Answer: To control average value of output variables
20 Where does the comparison level occur for 16-bit contents in the compare mode operation?
A Between CCPR1 register & TMR1
B Between CCPR1 & CCPR2 registers
C Between CCPR2 register & TMR1
D Between CCPR2 register & TMR0

Answer: Between CCPR1 register & TMR1

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